### EE 231 Lab 5: Using Altera to Implement an Arithmetic Logic Unit

The heart of every computer is an Arithmetic Logic Unit (ALU). This is the part of the computer which performs arithmetic operations on numbers, e.g. addition, subtraction, etc.  In this lab you will use the Altera language to implement an ALU with eight functions. Use of the "CASE" structure will make this job easy. The program below shows how to implement a variable function generator using the CASE structure.

```% s[1..0] | y                %
% ---------------------------%
% 00 | (a # b) & c           %
% 01 | a & b & !c            %
% 10 | a # b # c             %
% 11 | !a & b                %
SUBDESIGN alu
(
a, b, c, s[1..0]  : INPUT;
y                 : OUTPUT;
)
BEGIN
CASE s[1..0] IS
WHEN 0 => y = (a # b) & c;
WHEN 1 => y = a & b & !c;
WHEN 2 => y = a # b # c;
WHEN 3 => y = !a & b;
END CASE;
END;```
1. ALU Operations

Your ALU will perform eight functions on two 4-bit inputs (A and B). These inputs could represent either unsigned numbers (need carry-out), two's complement numbers (need overflow), or simply bit patterns.  The ALU will generate a 4-bit output (R), a carry, and an overflow. To select which of the eight functions to implement you will need three select inputs. A block diagram is shown in Figure 1.

Figure 1: The ALU block diagram.

The functions to be implemented for the various select inputs are shown in Table 1.

 S2S1S0 Function Description 000 A plus B Add A and B 001 A minus B Subtract B from A 010 B plus 1 Increment B 011 B minus 1 Decrement B 100 minus A In Two's Complement form 101 not A bitwise Complement of A 110 A or B Logical OR of A and B 111 A and B Logical AND of A and B

Table 1: ALU Functions.

2. Building the ALU with Altera

Implementing the ALU using Altera is easy. For example, to implement the ADD function, you could use the following statement:

``` WHEN 0 =>
(carry_out, r[3..0]) = (0, a[3..0]) + (0, b[3..0]);
overflow = (a[3]&b[3]&!r[3]) OR (!a[3]&!b[3]&r[3]);```

This will add two 4-bit numbers with a carry output (unsigned number interpretation). If as a result of the addition of the two four-bit numbers, A and B, a carry is generated, the fifth bit of the result (carry_out) will be set. The overflow bit is set when the sum of two positive numbers produces a negative number (two's complement number interpretation), or the sum of two negative numbers produces a positive number. The other functions are equally simple to implement. You should look in the Altera MAX+PLUS II online help to find out how to realize the other ALU functions.

Check your design by using the Altera simulator. Your ALU has eleven inputs, giving 211=2048 possible combinations. It would be tedious to check all 2048 combinations by hand. It would, however,  be possible to write a computer program to determine if all the outputs were correct. For this lab, you only have to check a few examples of each function to see if the ALU is working properly.

A computer with a 64-bit floating-point unit (FPU) has 2128 possible input combinations for two input numbers. If the ALU performs eight functions, there are 2136 possible combinations to check. If a test program could check one billion combinations a second, it would take ~3 x 1024 years to check all possible input combinations. Since the universe is only about 1010 years old, this is clearly impossible. In modern computers, engineers can only test a representative selection of possible inputs. Determining which representative set to check is a high art. Occasionally, bugs can slip in, such as occurred with the recent bug(s) in the Intel 820 support chipset.

For A = 1111 and B = 0010 simulate all the ALU functions, and check your results with the expected values. Repeat your check for A = 1001 and B = 0111.