#define FOC1	0x80
#define FOC2	0x40
#define FOC3	0x20
#define FOC4	0x10
#define FOC5	0x08

#define OC1M7	0x80
#define OC1M6	0x40
#define OC1M5	0x20
#define OC1M4	0x10
#define OC1M3	0x08

#define OC1D7	0x80
#define OC1D6	0x40
#define OC1D5	0x20
#define OC1D4	0x10
#define OC1D3	0x08

#define OM2	0x80
#define OL2	0x40
#define OM3	0x20
#define OL3	0x10
#define OM4	0x08
#define OL4	0x04
#define OM5	0x02
#define OL5	0x01

#define EDG4B	0x80
#define EDG4A	0x40
#define EDG1B	0x20
#define EDG1A	0x10
#define EDG2B	0x08
#define EDG2A	0x04
#define EDG3B	0x02
#define EDG3A	0x01

#define OC1I	0x80
#define OC2I	0x40
#define OC3I	0x20
#define OC4I	0x10
#define OC5I	0x08
#define IC4I	0x08
#define IC1I	0x04
#define IC2I	0x02
#define IC3I	0x01

#define OC1F	0x80
#define OC2F	0x40
#define OC3F	0x20
#define OC4F	0x10
#define OC5F	0x08
#define IC4F	0x08
#define IC1F	0x04
#define IC2F	0x02
#define IC3F	0x01

#define TOI	0x80
#define RTII	0x40
#define PAOVI	0x20
#define PAII	0x10
#define PR1	0x02
#define PR0	0x01

#define TOF	0x80
#define RTIF	0x40
#define PAOVF	0x20
#define PAIF	0x10

#define DDRA7	0x80
#define PAEN	0x40
#define PAMOD	0x20
#define PEDGE	0x10
#define DDRA3	0x08
#define I4O5	0x04
#define RTR1	0x02
#define RTR0	0x01

#define SPIE	0x80
#define SPE	0x40
#define DWOM	0x20
#define MSTR	0x10
#define CPOL	0x08
#define CPHA	0x04
#define SPR1	0x02
#define SPR0	0x01

#define SPIF	0x80
#define WCOL	0x40
#define MODF	0x10

#define TCLR	0x80
#define SCP1	0x20
#define SCP0	0x10
#define RCKB	0x08
#define SCR2	0x04
#define SCR1	0x02
#define SCR0	0x01

#define R8	0x80
#define T8	0x40
#define M	0x10
#define WAKE	0x08

#define TIE	0x80
#define TCIE	0x40
#define RIE	0x20
#define ILIE	0x10
#define TE	0x08
#define RE	0x04
#define RWU	0x02
#define SBK	0x01

#define TDRE	0x80
#define TC	0x40
#define RDRF	0x20
#define IDLL	0x10
#define OR	0x08
#define NF	0x04
#define FE	0x02

#define CCF	0x80
#define SCAN	0x20
#define MULT	0x10
#define CD	0x08
#define CC	0x04
#define CB	0x02
#define CA	0x01

#define PTCON	0x10

#define ADPU	0x80
#define CSEL	0x40
#define IRQE	0x20
#define DLY	0x10
#define CME	0x08
#define CR1	0x02
#define CR0	0x01

#define ODD	0x80
#define EVEN	0x40
#define BYTE 	0x10
#define ROW	0x08
#define ERASE	0x04
#define EELAT	0x02
#define EEPGM	0x01

#define RBOOT	0x80
#define SMOD	0x40
#define MDA	0x20
#define IRV	0x10
#define PSEL3	0x08
#define PSEL2	0x04
#define PSEL1	0x02
#define PSEL0	0x01

#define RAM3	0x80
#define RAM2	0x40
#define RAM1	0x20
#define RAM0	0x10
#define REG3	0x08
#define REG2	0x04
#define REG1	0x02
#define REG0	0x01

#define TILOP	0x80
#define OCCR	0x20
#define CBYP	0x10
#define DISR	0x08
#define FCM	0x04
#define FCOP	0x02
#define TCON	0x01

#define EE3	0x80
#define EE2	0x40
#define EE1	0x20
#define EE0	0x10

#define NOSEC	0x08
#define NOCOP	0x04
#define ROMON	0x02
#define EEON	0x01


