EE 308 Lab 7



EE 308 -- LAB 7
Additional Memory and Ports

This lab will add 32K of external memory, and two additional parallel I/O ports, to your board. The 32K memory will be located at addresses from 0x0000 to 0x7FFF. (The external memory from 0x1000 to 0x103F will not be accessible, because these are the addresses of the internal registers of the 68HC11.) When operating in the expanded mode, the 68HC11 uses Ports B and C to provide addresses and data for external devices. In order to compensate for losing these two valuable ports, we will also add a Motorola 68B21 Peripheral Interface Adapter to provide two I/O ports similar to Port C of the 68HC11. These two ports and their control registers will be located at memory addresses 0x8000 to 0x8003.

The attached schematic shows the necessary wiring to complete the memory expansion. Also attached are a layout diagram which shows you one way to place the chips on your EVBU, a wiring list which tells you exactly which pins to wire together, and an ABEL program which shows how the GAL is programmed. The parts and tools needed to do the wiring will be distributed in lab this week. The wiring should be complete and ready to check during your laboratory of Wednesday March 20 or Thursday March 21.

A few notes about the wiring:



Bill Rison, <rison@ee.nmt.edu >
Wed Jan 17 1996
© 1996, New Mexico Tech