Altera Code 8-bit Output Port

SUBDESIGN ea_out
(
    E               :  INPUT;   % E-Clock %
    R_W             :  INPUT;   % R/W Line %
    RESETn          :  INPUT;   % Reset line %

    PA[7..0]        :  BIDIR;   % Address and Data (15-8) from HC12 %
    PB[7..0]        :  BIDIR;   % Address and Data (7-0) from HC12 %

    EA[7..0]        :  OUTPUT;   % Expansion Port A %
)


VARIABLE
    demux[15..0]    :  DFF;    % Demuliplexed address internal %

    EAI             :  DFFE;   % Register for exp port A %

BEGIN

% ***********************************************************************%
% Address decoding and demultiplexing                                    %
% Latch address on rising edge of E clock                                %
% ***********************************************************************%

    demux[15..8].d = PA[7..0];
    demux[7..0].d = PB[7..0];
    demux[15..0].clk = E; 

% ***********************************************************************%
% Start of expansion ports                                               %
% ***********************************************************************%

%   A write to address 0x0400 writes to the internal EA flip flops %
%   Writes take place on the falling edge of E clock %

    EAI[].clk  = !E;
    EAI[].ena  = (demux[15..0].q == H"0400") & (R_W == GND);
    EAI[].d    = PA[];
    EAI[].clrn = RESETn; 

    EA[] = EAI[].q;

END;