EE 212 Lab

Lab 4: Step Responses of RC and RLC Circuits

Prelab 4

In this lab step responses of RC and RLC circuits will be generated and studied.

1. Construct the circuit shown in figure 1.

Predicted Measured
Initial Value, vout(0)    
Final (steady-state) Value, vout,ss = vout(&infin)    
10% - 90% Rise Time, Tr    
(Within 5%) Settling Time, Ts     
Percent Overshoot, 100%(peak value - vout,ss) / vout,ss    
Time Constant, τ    

2. Determine values of R, L, and C for the circuit shown in figure 3 so that the step response is a damped sinusoid with an exponential decay governed by an α of 105 (i.e. the damped sinusoidal response goes to e-1 of its final value in 10 μseconds) and a frequency of 1MHz. Use the 0.47mH inductor in your parts kit for L.

Predicted Measured
Initial Value    
Final Value    
Rise Time    
Settling Time (within 5%)    
Percent Overshoot    

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