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Up: 3 Supplementary Material Previous: 3.1 Introduction to Verilog


3.2 Using Quartus

To implement the circuits that you will design on the CPLD there are few key steps.
  1. Write your program using Verilog HDL.
  2. Compile your code.
  3. Correct any syntax errors.
  4. Simulate your circuit to make sure that you are getting the behavior you expect.
  5. Download your program onto the CPLD.
  6. Test the operation of circuit.
Quartus helps you implement all of the above easily. The following sections describe how to do those basics steps.

3.2.1 Start New Project

  1. Select File > New Project Wizard.
  2. Set the directory name. You may want to have a directory with the name ee231 where you save all your projects for this class. Make sure that you create a new project for each project and do not just copy the director over.
  3. Set the name of the project. It will be simple if you name it by the lab name, e.g., lab1.
  4. Click Yes to create the directory if it does not exist.
  5. You can add existing files if you have already them, otherwise select Next.
  6. Next you need to specify the device that you are using. Set the Device Family to MAX II and select EPM2210F324C3.
  7. Press Next.
  8. Press Finish.

3.2.2 Writing the Code

  1. Select File > New.
  2. Choose Verilog HDL File.
  3. Click Ok.
  4. Select File > Save As. For one file project name, the name of the file should be the same as the project. In addition, the module name should be the same as the filename
  5. Choose Save as type, and select Verilog HDL File.
  6. Put a check-mark in the box Add file to current project. Unless the file is part of the project you won't be able to proceed. If you don't add the file now you cal latter added by selecting Project > Add/Remove Files in Project.
  7. Click Save.
  8. Now you are ready to type in your program.

3.2.3 Compiling

  1. Select Processing > Start Compilation, or click on the play icon on the toolbar.
  2. You can click on Processing > Compilation Report to see the results of the compilation.
  3. If there are no errors, then your program is correct from the syntax point of view. This may not mean that your program will do what you want, because you may have some logic errors that the compiler will not be able to detect.

3.2.4 Pin Assignment

You need to specify which pins of the CPLD are connected to which inputs and which outputs. Some pins have already been wired to the LEDs and the push buttons. A list of those pins are provided in Table 1.
  1. Select Assignments > Assignment Editor.
  2. Under Category select Pin.
  3. Double click on «new», a drop-down menu will appear, select the input or output you want.
  4. In the column labeled Location select the pin you want. Table 1 shows the locations of hardwire for your evaluation board. For example, if you wanted to connect the output ''E'' to the first red LED, you would select Location Pin_U4 for Node E.
  5. Repeat steps 3 and 4 to assign all the inputs and outputs of your circuit.
  6. The Altera default is that all unused pins should be assigned ``As outputs driving ground''. This is a good choice for pins not connected to anything (it reduces power and noise), but is not good for pins which may be connected to, say, a clock input - you then have both the clock and the Altera chip trying to drive this input. A safer choice is to define all unused pins As input tri-stated with weak pull-up resistor. To do this,
    1. Go to Assignments > Device
    2. click on Device and Pin Options
    3. Select the Unused Pins tab
    4. From the Reserve all unused pins: drop-down menu, select As input tri-stated with weak pull-up resistor.

Table 1: Pin Assignments for the LEDs, buttons, and clock input
Signal Name CPLD Pin No. Description
LED[0] PIN_U13 Blue LED
LED[1] PIN_V13 Green LED
LED[2] PIN_U12 Yellow LED
LED[3] PIN_V12 Red LED
LED[4] PIN_V5 Blue LED
LED[5] PIN_U5 Green LED
LED[6] PIN_V4 Yellow LED
KEY[0] PIN_U15 Button1
KEY[1] PIN_V15 Button2
KEY[2] PIN_U14 Button3
KEY[3] PIN_V14 Button4
CLOCK_50 PIN_J6 50 MHz clock input

3.2.5 Simulating the Designed Circuit

When simulating a circuit you need to figure out the waveforms for the inputs that will make you confident that your circuit works. If you have a simple circuit, you can easily test all the possibilities. As the circuit gets more and more complicated you will need to figure out a scheme to verify its operation. In simulating your circuit there are three main steps.
  1. Create a waveform file.
  2. Select your inputs and outputs.
  3. Create a waveform for each input.
  4. Run the simulation to generate the output for verification with your expected results.

A detailed explanation of the above steps are described below.

  1. Select File > New.
  2. Click on Vector Waveform File.
  3. Click Ok.
  4. Save the file using some meaningful name, filename.vwf.
  5. Set the desired simulation time by selecting Edit > End.
  6. Select View > Fit in Window.
  7. Select the inputs and outputs you want to observe by clicking Edit > Insert > Insert Node or Bus.
  8. Click on Node Finder.
  9. Click on the input or output you want to observe and click on the > sign. Repeat this process for all your inputs and outputs.
  10. The next step is to specify the logic value of each of the inputs you have selected and the duration of that value.
  11. Save the file, e.g. lab2.vwf.
  12. After the waveforms have been defined, we can simulate our circuit. There are two types of modes that we are concerned with. 1) functional: we are not worried about the delays and we are interested to make sure that logically the circuit is working; 2) timing: we simulate the circuit and include the delays in all the gates. First perform the functional simulation and then perform the timing. To select the mode of the simulation:
    1. Select Assignments > Settings.
    2. Click on Simulator Settings.
    3. Choose Functional or Timing. For now choose Functional unless otherwise instructed.
  13. Create the required netlist that the waveform file will be applied to by selecting Processing > Generate Functional Simulation Netlist.
  14. Run the simulation by clicking Processing > Start Simulation, or by clicking on the play icon in the simulation waveform window.

3.2.6 Programming the CPLD

The final step is to program the CPLD with your designed circuit.
  1. Select Tools > Prgorammer.
  2. Select JTAG in the Mode box.
  3. If USB-Blaster is not chosen in the box next to the Hardware Setup, selected by clicking on the Hardware Setup.
  4. You should see a file listed with extension .pof, if not add it.
  5. Finally, press Start. The program will download on your board and once it is finished you can test your circuit in hardware.

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Up: 3 Supplementary Material Previous: 3.1 Introduction to Verilog
Copyright © 2008, Electrical Engineering Department, New Mexico Tech
Last Modified 2008-09-16