Hector Erives
Associate Professor
EE 231 Digital Electronics Lab Schedule:
Number Title
Lab 0 Wire Wrapping Project: Counter Board
Lab 1 HCMOS Logic Family
Lab 2 Introduction to Verilog HDL and Quartus
Lab 3 Decoders and Multiplexers
Lab 4 Debouncing Switches
Lab 5 4-Bit Adder/Subtractor
Lab 6 Arithmetic Logic Unit
Lab 7 Sequential Circuits
Lab 8 Registers
Lab 9 Computer control Unit
Lab 9 Computer control Unit
Lab 10 Build a Computer
Verilog file required for LAB 10
Make-up week
Last Modified: August 2013